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Preliminary Specification
PE95420
Product Description
The PE95420 is an RF SPDT (single pole double throw) switch and is available in a hermetically sealed ceramic package. The PE95420 is designed to cover a broad range of applications from near DC to 8500 MHz for use in various Hi-Rel industries and applications requiring broadband performance. It uses Peregrine's UltraCMOSTM process and features HaRPTM technology enhancements to deliver high linearity and exceptional harmonics performance. HaRP technology is an innovative feature of the UltraCMOSTM process providing upgraded linearity performance. The PE95420 is an absorptive/non-reflective switch design which is an ideal termination method for RF elements in a system design. A single-pin 2.2V CMOS logic control in a single chip solution reduces the number of control lines. RF SPDT Switch Hermetically sealed ceramic package DC - 8500 MHz Features * HaRPTM-Technology-Enhanced * Eliminates Gate and Phase Lag * No insertion loss or phase drift * High linearity 60 dBm IIP3 * Low insertion loss: * 0.8 dB at 100 MHz * 1.4 dB at 3000 MHz * 1.5 dB at 6000 MHz * High isolation * 65 dB at 100 MHz * 42 dB at 3000 MHz * 40 dB at 6000 MHz * 1 dB compression point of +30 dBm * Single-pin 3.3 V CMOS logic control * ESD tolerant to 2000 V HBM * Absorptive/Non-Reflective * Offered in a 7-lead Hermetic CSOIC Surface-Mount Package and in DIE form
Typical Industries
* * * * * * *
Medical Automotive Telecom Infrastructure Test Instrumentation Down-hole oil/gas Military Screening available for commercial space applications
Figure 2. Package Type
7-lead CSOIC
Figure 1. Functional Diagram
RFC RF1 RF2
ESD
ESD
50
CMOS Control Driver
50
VDD LS CTRL VSS
Document No. 70-0259-02 www.psemi.com (c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 7
PE95420
Preliminary Specification
Table 1. Electrical Specifications @ +25C, VDD = 3.3 V
Parameter
Operation Frequency Insertion Loss 100 MHz, 0 dBm 3000 MHz, 0 dBm 6000 MHz, 0 dBm 8500 MHz, 0 dBm 100 MHz 3000 MHz 6000 MHz 8500 MHz 100 MHz 3000 MHz 6000 MHz 8500 MHz 100 MHz 3000 MHz 6000 MHz 8500 MHz 100 MHz 3000 MHz 6000 MHz 8500 MHz 50% CTRL to 0.1 dB final value 6000 MHz 6000 MHz
Conditions
Min
DC
Typical
Max
8500
Units
MHz dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB s dBm dBm
Isolation - RF1 to RF2
Isolation - RFC to RF1/RF2
Return Loss ON State
Return Loss OFF State Switching Time Input 1 dB Compression Input IP3
0.8 1.2 1.5 1.7 82 48 35 30 74 46 42 33 20 21 16 9 19 18 15 10 2 33 60
Figure 3. Pin Layout (Top View)
RFC Pin 1
Table 2. Pin Descriptions
Pin No.
1 2 3 4 5
Pin Name
RFC1 RF11 VDD LS CTRL VSS RF2
1
Description
RF Common RF Port 1 Nominal 3.3 V supply connection Selects the RF1 to RFC path (See Table 5) Selects the RF2 to RFC path (See Table 5) Negative power supply. Apply nominal - 3.3 V supply RF Port 2
RF1
Pin 2
Pin 7
RF2
6 7
Pin 3 VDD
4
5
6
LS CTRL VSS
Note 1: No DC voltage should be applied at RF ports.
(c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 7
Document No. 70-0259-02 UltraCMOSTM RFIC Solutions
PE95420
Preliminary Specification
Table 3. Operating Ranges
Parameter
VDD Positive Power Supply Voltage VDD Negative Power Supply Voltage IDD Power Supply Current
(VDD = 3.3V, LS or CTRL = 3.3V)
Table 5. Truth Table
Typ
3.3 -3.3 100
Min
3.0 -3.6
Max
3.6 -3.0
Units
V V
LS
0 0 1
CTRL
0 1 0 1
RFC-RF1
off off on on
RFC-RF2
off on off on
A V 0.3xVDD V C dBm
1
Control Voltage High Control Voltage Low Operating temperature range RF Power In: 20 MHz 8.5 GHz
0.7xVDD
Exposed Solder Pad Connection
The exposed solder pad on the bottom of the package must be grounded for proper device operation.
-40
85 24
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESDsensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rate specified.
Table 4. Absolute Maximum Ratings
Symbol
VDD VC1 VC2 TST VESD
Parameter/Conditions
Power supply voltage Voltage on LS input Voltage on CTRL input Storage temperature range ESD voltage (Human Body Model)
Min
-0.3 -0.3 -0.3 -65
Max
4.0 VDD+ 0.3 VDD+ 0.3 150 2000
Units
V V V C V
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up.
Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability.
Switching Frequency
The PE95420 has a maximum 25 kHz switching rate.
Performance Plots Figure 4. Isolation, RFC-RF1, VDD=3.3V across Temperature Figure 5. Isolation, OFF-State
Document No. 70-0259-02 www.psemi.com
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PE95420
Preliminary Specification
Figure 6. Insertion Loss
Figure 7. Return Loss, RFC ON
Figure 8. Return Loss, RFC OFF
(c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 7
Document No. 70-0259-02 UltraCMOSTM RFIC Solutions
PE95420
Preliminary Specification
Evaluation Boards
The SPDT switch EK Board was designed to ease customer evaluation of Peregrine's PE95420. The RF common port is connected through a 50 transmission line via the top SMA connector, J1. RF1 and RF2 are connected through 50 transmission lines via SMA connectors J2 and J3, respectively. A through 50 transmission is available via SMA connectors J5 and J6. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The evaluation kit board is constructed of four metal layers. The dual clad top RF layer is Rogers RO4003 material with an 8 mil RF core and er = 3.55. The other two dielectric layers are FR4 for DC control and overall board strength with an cumulative board thickness of 62 mils. The RF transmission lines were designed using a Grounded co-planar waveguide with a linewidth of 15 mils and gap of 7 mils.
Figure 9. Evaluation Board Layouts
Peregrine Specification 101-0345
Figure 10. Evaluation Kit Schematic
Peregrine Specification 102-0417
142 -0761 -881 /891 J1
2
1
RFC
1
J2 142-0761-881/891
U1
9 SOCKET MOUNTING HOLE 10 SOCKET MOUNTING HOLE 11 SOCKET MOUNTING HOLE 12 SOCKET MOUNTING HOLE 7 RF2 1
RFC
J3 142-0761-881/891
1
RF1
2
RF1
PE95420
RF2 GND
8 THERMAL SLUG
2
CTRL
VDD
3
4
5
J4 HEADER14
2 4 6 8 10 12 14
2 4 6 8 10 12 14
1 3 5 7 9 11 13
1 3 5 7 9 11 13
VSS
CTR CTRL VDD LS LS VDD
6
VSS
LS
J5 142-0761-881/891
142-0761-881/891
1
R1 DNI C4 22pF C3 22pF C2 22pF C1 22pF
Through Line
1
2
Document No. 70-0259-02 www.psemi.com
(c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 7
2
2
J6
PE95420
Preliminary Specification
Figure 11. Package Drawing
7-lead CSOIC
PE95420
NOTES: 1. PACKAGE BODY MATERIAL: WHITE ALUMINA 92% 2. CONDUCTOR TRACES MATERIAL: THICK FILM TUNGSTEN 3. LEAD IS Fe-Ni-Co ALLOY 4. BASE IS Cu-W 5. PLATING: ELECTROLYTIC GOLD 50 MICRO-INCHES MIN, OVER ELECTROLYTIC NICKEL 75 MICRO-INCHES MIN. 6. ALL DIMENSIONS ARE IN INCHES [MILLIMETERS] 7. TOLERANCES: .005 [0.13] UNLESS OTHERWISE SPECIFIED. 8. ALL GROUND LEADS AND GROUND PADDLE MUST BE SOLDERED TO PCB RF GROUND.
Table 6. Ordering Information
Order Code
95420-01 95420-11 95420-99 95420-00 PE95420-EK
Part Marking
9542001 9542011
Description
PE95420-7CSOIC-50B Engineering Samples PE95420-7CSOIC-50B Production Units Production Die PE95420 Evaluation Kit
Package
7-lead CSOIC 7-lead CSOIC Die Evaluation Board
Shipping Method
50 Count Trays 50 Count Trays 400 Units/Waffle Pack 1 / Box
(c)2008 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 7
Document No. 70-0259-02 UltraCMOSTM RFIC Solutions
PE95420
Preliminary Specification
Sales Offices
The Americas Peregrine Semiconductor Corporation
9380 Carroll Park Drive San Diego, CA 92121 Tel: 858-731-9400 Fax: 858-731-9499
Peregrine Semiconductor, Asia Pacific (APAC)
Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652
Peregrine Semiconductor, Korea
#B-2607, Kolon Tripolis, 210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-943 South Korea Tel: +82-31-728-3939 Fax: +82-31-728-3940
Europe Peregrine Semiconductor Europe
Batiment Maine 13-15 rue des Quatre Vents F-92380 Garches, France Tel: +33-1-4741-9173 Fax : +33-1-4741-9173
Peregrine Semiconductor K.K., Japan
Teikoku Hotel Tower 10B-6 1-1-1 Uchisaiwai-cho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213
Hi-Rel Products
Americas: Tel: 858-731-9453 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence Cedex 3, France Tel: +33-4-4239-3361 Fax: +33-4-4239-7227
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp.
Preliminary Specification
The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice).
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Document No. 70-0259-02 UltraCMOSTM RFIC Solutions

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